Students who have already appeared in remedial exam of ADE and PS-2 on 17/4/2026 are instructed to prepare and write two question papers of GTU (Winter-2025) and (Summer-2025)with options in a notebook .
Further instructed related to above task and examination is given in last week of April-2026. Meeting with the students will be arranged on 29/4/2026 at 11 am at HOD office/room no 4108.
Government
Engineering College, Bharuch
Electrical
Engineering Department
Notice
Date: 18/04/2026
All the students of Semester–II are hereby informed
that the Progress Presentation for the subject Design Thinking
will be conducted as per the schedule mentioned below.
Details:
All students are required to prepare and present their
progress (problem identification, idea development, prototype/model, etc.) as
per the guidelines given by the GTU.
Students must be present on time with their presentation
materials (PPT/canvas/Report/Prototype). Attendance is mandatory.
For any queries, contact your Project Guide faculty.
By Order
All students are hereby informed that those who have a backlog in the Progressive Assessment (Mid-Semester Examination) of 3rd, 5th, and 7th Semester are required to contact their respective Subject Coordinators to arrange their examination.
All such arrangements must be completed on or before 5th May 2026.
Students are instructed to comply within the stipulated time. No requests will be entertained after the deadline.
By Order
Head of Department
Electrical Engineering Department
GEC, Bharuch
GOVERNMENT ENGINEERING COLLEGE, BHARUCH
ELECTRICAL ENGINEERING DEPARTMENT
SYLLABUS FOR REMEDIAL ASSESMENT-April-2026
SUBJECT: POWER SYSTEM-II
SUBJECT CODE: 3150911
All students who have to appear in remedial examination of Power system-2 subject are instructed to remain present for remedial examination on 17/4/2026 at 1:00 PM AT ROOM NO -4104
Examination will be of 30 marks and Syllabus will be as below.
CHAPTER NO. | CONTENT | COURSE OUTCOME |
1 | Basic Principles: Power in single phase AC circuits, Complex power, Complex power balance, Complex power flow, Balanced Three Phase Circuits, Star connected loads, Delta connected loads, Delta- star transformation, Per phase analysis, Balanced three phase power. | 1 |
2 | Representation of Power System Components: One line and impedance diagram, Per unit system, Per unit representation of transformer, Per unit impedance diagram of power system, Examples – per unit system and impedance diagram, Synchronous machine, Power factor and power control, Salient pole synchronous generator, Operating chart of a synchronous generator, Representation of loads. | 1 |
3 | Transmission Line Modeling and Performance: Introduction, Short transmission line, Medium transmission line, Long transmission line Rigorous solution, Evaluation of ABCD constants, Interpretation of long line equations, Ferranti effect, Tuned power lines, Power through a transmission line, Circle diagrams, Methods of voltage control, Examples. | 2 |
4 | Symmetrical Fault Analysis: Introduction, Transient on a transmission line, Short circuit of a synchronous machine on no load, short circuit of a loaded synchronous machine, Selection of circuit breakers. | 3 |
5 | Symmetrical Components: Symmetrical component transformation, Phase shift in star-delta transformers, Sequence impedances of transmission lines, Sequence - impedances and networks of synchronous machines. | 3 |
6 | Unsymmetrical Fault Analysis: Introduction, Symmetrical component analysis of unsymmetrical faults, Single line to ground fault. | 3 |
7 | Corona: Critical Disruptive Voltage, Corona Loss, Line Design based on Corona, Disadvantages of Corona, Radio Interference, Inductive interference between Power and Communication lines, Examples. | 4 |
Course outcome:
Sr. No. | CO Statement |
1 | Prepare the model of transmission line, generator and transformer of power system for single line diagram representation and per unit quantity calculation. |
2 | Evaluate performance of short, medium and long transmission lines. |
3 | Analyze symmetrical and unsymmetrical faults in power system. |
4 | Describe various aspects of over-voltages and corona in power transmission. |
Suggested Specification table with marks (Theory): Distribution of Theory Marks | |||||
R Level | U Level | A Level | N Level | E Level | C Level |
10 | 20 | 20 | 25 | 15 | 10 |
GOVERNMENT ENGINEERING COLLEGE, BHARUCH
ELECTRICAL ENGINEERING DEPARTMENT
SUBJECT: ANALOG AND DIGITAL ELECTRONICS
SUBJECT CODE: BE03009011
REMEDIAL EXAMINATION
Syllabus-April -2026
All the students who have to appear in remedial exam of analog and digital electronics are instructed to remain present for remedial examination on 17/4/2026 AT 1:00 PM at room no 4104.
Syllabus of examination is as below and exam will be of 30 marks.
Chapter no | Content | Course Outcome |
1 | Differential, multi-stage and operational amplifiers Power amplifier , Differential amplifier, Direct coupled multi-stage amplifier; internal structure of an operational amplifier, ideal op-amp, non-idealities in an op-amp (Output Offset voltage, input bias current, input offset current, slew rate, gain band width product) | 1,2 |
2 | Linear applications of op-amp Idealized analysis of op-amp circuits. Inverting and non-inverting amplifier, differential amplifier, instrumentation amplifier, integrator and differentiator, active filter, voltage regulator, oscillators (Wein bridge and phase shift). | 3 |
3 | Non linear applications of op-amp Hysteretic Comparator, Zero Crossing Detector, Square-wave and triangular-wave generators. Precision rectifier, Peak detector. | 3 |
4 | Combinational Digital Circuits Standard representation for logic functions, simplification of logic functions using K- map and Boolean algebra, Don’t care conditions, Multiplexer, DeMultiplexer/Decoders, Adders, Subtractors, BCD arithmetic, carry look ahead adder, serial adder, digital comparator, parity checker/generator, code converters, priority encoders, decoders/ drivers for display devices | 1,4 |
5 | Sequential circuits and systems A 1-bit memory, the circuit properties of Bi-stable latch, the clocked SR flip flop, J- K, T and D types flip-flops, applications of flip-flops. | 1,4 |
Sr. No. | CO Statement |
1. | Comprehension of various types of analog and digital components – OPAMP, Combinational and sequential circuits, ADC and DAC, involved in the analog and digital systems. |
2. | Describe the functioning and selection of OP-AMP as per application. |
3. | Design and testing of OP-AMP based circuits. |
4. | Design and implement Combinational and Sequential logic circuits. |
