EXTERNAL VIVA SCHEDULE FOR DESIGN ENGINEERING II A (3150001) FOR 5TH SEM

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Students having backlog in Design Engineering II A (3150001) are hereby informed to remaing present on 27/06/2025 without fail. Kindly reaming present with all necessary documents on the viva day.

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Analog and Digital electronics (BE03009011)-Syllabus, Question bank, Lab manual, Self learning work submission.

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  Syllabus of Analog and digital Electronics   Question bank of Analog and digital electronics Self learning /Term work submission(30 marks) ADE_Chart Preparation NPTEL Video link: Experiment-1 Experiment-2 Experiment-3 Experiment-4 Experiment-5 Experiment no-6 Experiment-7 Experiment-8 Experiment-9 Experiment-10 Assignment-1-Number System Virtual lab list Lab sessions: Wednesday(Batch-A1,A2,A3,A4) Lab faculty : Batch-A1:Prof.S.I.Shah                             Batch-A2:Prof.P.K.Shah                             Batch-A3:Dr.A.T.Patel                             Batch-A4:Prof.H.C.Ejner
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